Sputtering is a physical vapor deposition (PVD) process in which high-energy ions impact and erode a solid target and deposit the target material on the surface of a substrate such as a semiconductor substrate, a specific example being a silicon wafer. In semiconductor fabrication, the sputtering process is usually accomplished within a semiconductor fabrication chamber also known as a PVD process chamber or a sputtering chamber.
A typical semiconductor fabrication chamber has a target assembly including disc-shaped target of solid metal or other material supported by a backing plate that holds the target. Material sputtered from the edges of the target may contribute to a non-uniform deposition of the material on the surface of a substrate within the PVD chamber. To promote uniform deposition, the PVD chamber may have an annular concentric metallic ring circumferentially surrounding the disc-shaped target, which is often called a darkspace shield. The gap between the inner surface of the darkspace shield and the circumferential surface of the target is typically referred to as the darkspace gap.
In many applications, it is preferred that the darkspace gap be kept large enough to inhibit or prevent electrical arcing between the target and the darkspace shield, which are often at different electrical potentials. On the other hand, it is often preferred that the darkspace gap be kept small enough to prevent PVD plasma ignition within the gap and also to reduce the amount of sputtered material entering the darkspace gap and depositing onto the circumferential surface of the target. Such depositions on the target edge may cause particle contamination on processed semiconductor wafers or other workpieces. To provide a suitable darkspace gap around the complete periphery of the target, proper alignment of the target and the darkspace shield is often needed. In prior sputtering chambers, the target and the darkspace shield are typically each aligned to the chamber body in which the target and darkspace shield are installed.
FIGS. 1 and 2 illustrate a prior art arrangement of a darkspace shield and a target assembly. FIG. 1 is a schematic, cross-sectional illustration of a prior art a semiconductor fabrication chamber 100 comprising a chamber body 102 and a substrate 104 supported by a substrate support 106 within the chamber body 102. A target assembly 111 includes a target 112 supported by a backing plate or backing plate 114. The target includes a face or sputterable area 120 of disposed in a spaced relationship with respect to the substrate support 106.
As shown in FIGS. 1 and 2, a darkspace shield 108 comprising a generally annular shaped metal ring extends circumferentially around the target 112 and defines a darkspace gap 116 between the darkspace shield 108 and the edge of the target 112. The darkspace shield 108 is held in place in the chamber by a darkspace shield support 110. In addition to the vertical darkspace gap 116, a horizontal darkspace gap 118 is defined between the darkspace shield 108 and the backing plate 114.
While various solutions have been proposed to improve alignment of components and control of the darkspace gap, for example the design described in U.S. Pat. No. 7,097,744, there is still a need for methods and apparatus for improving control of the darkspace gap in PVD chambers.